In this post we describe an application of PSoC component having the aim to realize a high-precision coincidence detection circuit to be applied in the detection of nuclear signals.
PSoC (Programmable System-on-Chip) is a family of microcontroller integrated circuits by Cypress Semiconductor. These chips include aCPU core and mixed-signal arrays of configurable integrated analog and digital peripherals.
A PSoC integrated circuit is composed of a core, configurable analog and digital blocks, and programmable routing and interconnect. The configurable blocks in a PSoC are the biggest difference from other microcontrollers.
PSoC has three separate memory spaces: paged SRAM for data, Flash memory for instructions and fixed data, and I/O Registers for controlling and accessing the configurable logic blocks and functions.
PSoC resembles an ASIC: blocks can be assigned a wide range of functions and interconnected on-chip. Unlike an ASIC, there is no special manufacturing process required to create the custom configuration — only startup code that is created by Cypress’ PSoC Designer (for PSoC 1) or PSoC Creator (for PSoC 3 / 4 / 5) IDE.
PSoC resembles an FPGA in that at power up it must be configured, but this configuration occurs by loading instructions from the built-in Flash memory.
PSoC most closely resembles a microcontroller combined with a PLD and programmable analog. Code is executed to interact with the user-specified peripheral functions (called “Components”), using automatically generated APIs and interrupt routines. PSoC Designer or PSoC Creator generate the startup configuration code. Both integrate APIs that initialize the user selected components upon the users needs in a Visual-Studio-like GUI.
In our application we used the model PSoC 5LP. For development we used both the CY8CKIT-059 kit and the more complete board CY8CKIT-050, both are shown in the images below :
With PSoC 5LP, a coincidence detector circuit has been realized, it accepts two analog input signals produced by SiPM or PMT sensors. It counts the pulses of both the channels and the coincidence channel. The firmware stored in the microcontroller also calculates the pulse rates (CPS and CPM) and also calculates the deviation σ of the counting result. The data are presented on a two-line display with 16 characters . The image below describes the block diagram of the circuit :
The image below shows the PSoC 5LP board used for development of the system and the power supply and amplification sections for the SiPM sensors.
The PSoC 5LP has been programmed with the development system PSoC Creator, freely downloadable from the manufacturer’s website. Using this tool, with a rich and simple graphical interface, the chip is programmed and are all the used components are defined and configured.
We go through the main points of the project.
The system is synchronized by means of a series of clock signals, the main of which is the BUS_CLK that has a frequency of 58MHz (this frequency is set in configuration and depends on the characteristics of the circuit that is being achieved), it synchronizes the operation of all the components. The period of this signal is about 20ns , this is important because it corresponds to the minimum duration of the signals that can be managed correctly by the system. Signals shorter than 20ns may be managed incorrectly or may not be read by the system. In our project we have established for the signals a minimum duration of 40ns, well above the limit of 20ns.
The analog input pulses coming from the two sensors ( Pin_A and Pin_B ) are sent to two comparators which perform the comparison against a programmable threshold in order to produce a positive digital pulse when the signal is above threshold. The threshold is generated by two DAC converter that can take the value from the software or by an external trimpot if you want a configurable threshold. In our case we used the “low noise” potentiometer already present on the development board. For our signals the threshold was set to 100mV. The comparators have been configured as “fast” and with hysteresis to prevent false pulse. The signal from the comparator output is sent to a D-type Flip Flop, “edge detector”, with an external RC network, in order to obtain stable pulses with fixed duration of 40ns.
The pulses produced by the comparators are sent to an AND logic gate which performs the “coincidence” of the signals. Since the coincidence pulse may have a variable duration, downstream it is placed a D-type Flip Flop with external RC network to obtain a clean pulse of 40ns. The latter also produces a further pulse of 0.01s used to turn on a LED in order to give a visible feedback of the coincidence event.
The pulses of channels A and B and the coincidence pulses are sent to digital counters which perform the pulse counting. There is also a counter that counts the seconds so as to measure the duration of the counting operations.
The system is equipped with three buttons and a LED that lights up when you press any of the three buttons.
The functions of the three buttons are as follows :
– Reset Counters
– Start / Stop Counting
– Display Switch
In the picture below you can see the typical pulse produced by the circuit. The FWHM is of 40ns, the rising and falling edges of the pulse are approximately 5-10ns, while the amplitude is about 3.5V (the PSoC is operated at 3.3V).
In the image below we compare the signal produced by SiPM with the pulse generated by the circuit. It can be noted that the pulse is delayed with respect to the rising edge of the signal of about 80ns. This delay is due to the response time of the PSoC comparator can not be reduced.
In the image below we perform an estimate of the pulse time jitter. Most of the pulses fall in a time range of about 20ns, then by adopting a duration of 40ns we ensure adequate coverage in the detection of coincidences.
This image shows instead the typical case of two coincident pulses, as we see the temporal overlap is good and this assures us the production of an output coincidence pulse.
Test with SiPM Sensors and LYSO Scintillators
The coincidence circuit is used primarily with SiPM sensors coupled to a scintillator SiPM. For more details you can see the following post :
The images show the sensor with its light-tight container.
An evaluation of random coincidences has been made, by arranging the sensors as shown in the picture below, separated by two lead ingots with a thickness of 5cm. This screen is necessary because the intrinsic radioactivity of LYSO, probably because of the X-ray fluorescence, generates a non-negligible rate of coincidences when the two sensors are placed near each other. With the lead screen this contribution is made negligible and remain only random coincidences.
Likelyhood of False Coincidences
If we assume that the coincidence circuit has a time resolution equal to τ, then the probability of accidental coincidences is the following :
P = 2τC1C2 = 2 x 40 x 10-9 x C1 x C2
Τ = 40 nsec
C1 = counting rate detector 1
C2 = counting rate detector 2
By adjusting the discriminator threshold at 100mV (corresponding to about 100 keV) we obtain the following counting rates :
C1 = 87,8 CPS
C2 = 88,0 CPS
P = 2 x 40 x 10-9 x 87,8 x 88,0 = 0,618 x 10-3 s-1 equivalent to 0,037 CPM
The measured coincidences rate has the following values :
Measuring time = 24h = 86400s
σ = 0,006
0,042 ± 0,006 CPM
In good agreement with the theoretical value.
References & Links
- PSoC 5LP
- PSoC CY8CKIT-059 Prototyping kit
- PSoC Cy8CKIT-050 Prototyping kit
- PSoC Creator
- Low-Cost Coincidence Counting apparatus For Single Photon Optics Investigations
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