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Charge Sensitive Preamplifier

Charge Sensitive Preamplifier is an electronic device that can integrate a current signal and generate a voltage signal with an amplitude proportional to the incoming input charge.
The signal produced by many detectors is of very low amplitude and therefore needs adequate amplification. If the output signal can be assimilated to a current pulse then it is convenient to use a preamplifier that is based on a charge sensitive preamplifier type (CSP): the current pulse generated by the detector is converted into a voltage pulse by means of the charge of a capacitor. In the scheme below it is presented ta basic diagram of a charge preamplifier :

csp

Response of a CSP

cspinput

At time domains lasting up to a few microseconds, the CSP output is the time integral of the current pulse from the photodiode detector. The output rise time is approximately equal to the duration of the current pulse, although the speed of the CSP sets a lower limit to this rise time.
Because the CSP Produces an output voltage step that is proportional to the time integral of the current input and remembering that :

formula

the CSP output is proportional to the total charge (Q) from the detector. At much longer time domains the response of a CSP to a fast current pulse from a detectors is in the form of a tail pulse. A tail pulse has a fast initial rise time followed by a very long exponential decay back to the baseline. A tail pulse response from a CSP module is shown below.cspoutput

The reason for the exponential decay is the resistance that is placed in parallel to the feedback capacity. This solution is necessary so that the CSP can respond to subsequent pulses.

Shaping the tail pulse into a Gaussian pulse

The output of the CSP (with its tail pulse signal shape) should only be considered to be an intermediary step in producing a measurable output. The long tail makes digitizing the pulse heights impractical, because pulses will often ride on top of the long tail of one or perhaps several preceding pulses. To quicken the decay time of the pulses we recommend routing the CSP output into a shaping amplifier internship which produces a symmetrical bell-shaped pulse. Another important feature of the shaping amplifier is that much of the noise is filtered, improving the signal to noise ratio considerably. Signals that may be buried in the noise of the CSP output become clearly above the noise after the shaping internship.

Building the Charge Sensitive Preamplifier (CSP)

The charging preamplifier and the photodiode bias circuit are shown in the following diagram. The operational amplifier is the model OPA656, characterized by JFET input stage with low noise, low bias current and wide bandwidth. This component is particularly suitable for the production of high speed and low noise integrating stages. The photodiode is inversely biased through a 100MΩ bias resistor, to reduce the Johnson noise. To reduce the capacity of the photodiode junction, the maximum reverse voltage of 30V is used. This allows you to reduce overall capacity and reduce noise.

To achieve low noise noise preamplifier (CSP), we used a DEM-OPA-SO-1A demo board for SMD operational amplifiers. The PCB shown in the side figure allows the creation of classic circuits with OP AMP using SMD components.
The PCB wiring diagram, with the indication of the components is shown in the picture below.
of course, not all components are to be used, some will be replaced by jumpers, others simply will not be mounted and will therefore be an open circuit.
The SMD components that we have used are the following:

L1 = L2 = EMI-Suppression Ferrite Chip 600R 0,5Ω
C1 = C2 = Tantalum Chip Capacitor, SMD EIA Size 3528, 20V, 2,2 μF
C4 = C5 = Multilayer Ceramic Chip Capacitor, SMD 1206, 50V, 0,1 μF
R6 = parallel of Rf (100 MΩ) and Cf (0,5 pF) feedback CSP
R4 = coupling capacitor Cc 0,1 μF
R7 = jumper
R3 = jumper

The following image shows the general scheme of the demo board.

Front of the CSP with photodiode mounted directly on the PCB to reduce the parasitic capacity
Back of the CSP with feedback components mounted on the demo PCB
CSP with bias photodiode bias

Pulses

The following pictures show examples of pulses obtained with a SiPM detector : blue trace is detector signals and yellow one is the output from the CSP. It can be seen how the pulse produced by the detector is a spike, with an amplitude of about 1 V and a duration of about 400 ns. The pulse produced by CSP instead has a “slow” exponential decay with a much longer duration: 40 μs.

 

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